1. Field of the Invention
This invention relates to integrated circuit package technology, and more particularly, to an integrated circuit package with a heat sink for dissipating heat generated by integrated circuit chip.
2. Description of Related Art
An integrated circuit chip is capable of holding a very great number of circuit components, including resistors, capacitors, and transistors, in a very small semiconductor die. In use, an integrated circuit chip is typically enclosed in a package for easy handling. To allow increased functionality from a single integrated circuit package, a number of integrated circuit chips can be mounted together in one package. This type of integrated circuit package is customarily referred to as a multi-chip-module integrated circuit package.
In the manufacture of integrated circuit packages, there are two major topics in design; heat dissipation and pin arrangement. Heat dissipation is typically provided by mounting a heat sink to the chip, while pin arrangement is now designed using the so-called Ball Grid Array (BGA) technology. The BGA structure is typically provided with arrayed solder balls on the bottom on an integrated circuit package to allow the integrated circuit package to be electrically bonded to external circuitry. In this case, the heat sink can only be mounted on the top side of the integrated circuit package. One such integrated circuit package is disclosed in U.S. Pat. No. 5,736,785, which is schematically illustrated in FIG. 5. As shown, this patented integrated circuit package, here indicated by the reference numeral 1, includes a substrate 104 on which an integrated circuit chip 102 is mounted. A heat sink 116 is mounted on the substrate 104 for heat dissipation. The chip 102, the substrate 104, and the heat sink 116 are all enclosed in an encapsulation 112 formed by encapsulating resin. The heat sink 116 is formed with a circular recessed portion 116a whose bottom side is adhered by silver glue onto the top side of the chip 102. This allows the heat generated by the chip 102 to be dissipated via the heat sink 116 to the atmosphere. The heat sink 116 is further formed with a recessed portion 116c whose depth is larger than the depth of the recessed portion 116a. By means of the recessed portion 116c, the heat sink 116 can be securely mounted on the top side of the substrate 104. Further, the heat sink 116 is formed with a part of heat sink 116 to come in contact with the atmosphere so that the heat can be dissipated to the atmosphere.
The foregoing integrated circuit package of FIG. 5, however, has some drawbacks. First, the heat sink 116 would be off-center to the encapsulant 112 due to he reason that the mounting of the heat sink 116 on the chip 102 requires the use of a jig (not shown) for precise positioning of the heat sink 116, and the use of this jig requires a tolerance to be left between the heat sink 116 and the jig (not shown), which would make the heat sink 116 to be slightly deviated in position from the chip 102. The off-center arrangement of the heat sink 116 would make the outer appearance of the integrated circuit package unappealing.
Second, since the heat sink 116 is different in thermal expansion coefficient from the chip 102, delamination could occur to the silver paste layer used to adhere the heat sink 116 to the chip 102 under high-temperature condition during the transfer molding process. This would make the heat sink 116 easily loosen off position from the chip 102.
Third, the chip 102 could be easily cracked during the transfer molding process due to the pressure from the molding resin flow via the circular recessed portions 116a against the chip 102 which is delicate and weak in structure.
Fourth, the encapsulation 112 would be easily formed with undesired voids therein. This is because that the molding resin flow during the transfer molding process would be blocked by the recessed portions 116a, 116c, thus causing disturbances to the molding resin flow, resulting in the forming of voids in the encapsulant 112.
FIG. 6 is a schematic sectional view of another conventional integrated circuit package, as indicated by the reference numeral 2. As shown, this integrated circuit package 2 includes a substrate 21 on which an integrated circuit chip 20 is mounted. A heat sink 22 is mounted on the substrate 21 for heat dissipation. The chip 20, the substrate 21, and the heat sink 22 are all hermetically enclosed in an encapsulant 23. The heat sink 23 has a circular upper portion 220 and a bottom portion 222. The upper portion 220 defines an area 221 to enclose the chip 20 therein, and the bottom portion 222 is used to support the upper portion 220 at an elevated height from the substrate 21. The upper portion 220 has a top surface 223 exposed to the outside of the compound 23. In order to allow the heat sink 22 to be precisely positioned on the substrate 21, a jig (not shown) should be used. Hence, the drawback of off-center arrangement in the integrated circuit package of FIG. 5 still exists in the integrated circuit package of FIG. 6. Moreover, since the bottom portion 222 of the heat sink 22 is mounted on the substrate 21 by using an adhesive material, the integrated circuit package of FIG. 6 would easily suffer from delamination as in the case of the integrated circuit package of FIG. 5. Further, one particular drawback to the integrated circuit package of FIG. 6 is that the resin flow used in the transfer molding process to form the encapsulant 23 would be flashed over the top surface 223 of the heat sink 22 if the bottom portion 222 is insufficiently elevated to allow the top surface 223 of the heat sink 22 to be adequately exposed to the outside of the encapsulant 23. When flashing happens, it would also cause the exposed area of the heat sink 22 to be reduced, thus lessening the heat dissipating efficiency by the heat sink 22; and whereas, if the bottom portion 222 of the heat sink 22 is overly elevated, it would cause the top surface 223 to abut overly forcibly on the mold (not shown) used in the transfer molding process, thus causing delamination to the adhesive materiale layer between the substrate 21 and the bottom of the bottom portion 222. Moreover, the upper portion 220 and the bottom portion 222 of the heat sink 22 would cause disturbance to the resin flow used in the transfer molding process, thus causing the resulted encapsulant 23 to be formed with undesired voids. The use of the integrated circuit package of FIG. 6 is therefore still unsatisfactory.
The particular structures of the heat sinks 116, 22 used in the integrated circuit packages of FIGS. 5 and 6 would make the chip mounting area such small that they are used chiefly to pack one chip therein and hardly can be used to pack two or more chips. Therefore, they would not meet multi-chip-module package requirements.